During the recent EE Times chiplets events in person in San Francisco and also the virtual event, it was clear that there’s a huge appetite to learn more about and understand the topic of chiplets. Conceptually it’s not new, but we are at a stage in chip design when complexity demands a more process-driven approach to designing with chiplets to reduce costs and development time, even though the use of multiple dies or chiplets creates new challenges.

As we saw at our events, there were many questions as well as examples of what’s already being deployed. One of the speakers at our event, Eddie Ramirez, VP of the infrastructure business at Arm, said after the event in a blog, “The chiplet era is underway. Walking through Moscone Center in San Francisco recently during the 62ndDAC, one thing jumped out at me: that reality was impossible to ignore – not just in the technology demonstrations, but in the conversations happening between foundries, IP vendors, OEMs and design houses. We’ve moved from asking “if” chiplets will scale to collaboratively solving “how” we design, validate and deploy multi-vendor systems across an integrated ecosystem.

In another recent announcement, Arteris said that AMD had licensed its FlexGen network-on-chip (NoC) interconnect IP for its next generation of AI chiplet design, providing high-performance data transport in AMD chiplets powering AI across the company’s broad portfolio.

And in the recently published EE Times Silicon 100 report for 2025, there are eight startup companies associated with chiplet design and manufacturing (see Silicon 100: Chiplet work spanning interconnect PHYs to smart substrates). As Majeed Ahmed, Editor-in-Chief of EDN wrote in this report, “The red-hot nature of the chiplets world and how this new multi-die technology landscape is emerging despite geopolitical headwinds.”

Beginnings of an acquisition spree in chiplets

But as witnessed by the recent acquisitions of Blue Cheetah by Tenstorrent, and Alphawave by Qualcomm, there appears to be the beginnings of an acquisition spree in chiplets. In a report from Woodside Capital Partners (a corporate finance advisory firm) entitled, “The Chiplet Consolidation Wave: How Strategic Acquisitions are Shaping the Future of Silicon”, the authors comment, “The technical complexities and strategic importance of chiplets have triggered a land grab for foundational IP and talent. This M&A activity is reshaping the semiconductor value chain, creating new opportunities and elevating the importance of specialized innovators.”

The corporate finance advisory firm’s George Jones and Alain Bismuth say that the chiplets transition represents a fundamental re-imagining of how complex circuits are designed and manufactured. They comment, “However, the popular “Lego Block” analogy belies the immense technical and business challenges that underscore the infancy of this new ecosystem. The path to a genuinely open, multi-vendor chiplet marketplace is not a simple assembly job; it is a frontier defined by profound hurdles in reliability, testing, and security that the industry is only now beginning to address.”

They explain that the acquisition of Blue Cheetah by Tenstorrent is a perfect case study in the land grab for IP and talent. Jones and Bismuth said, “It was a multi-layered move to de-risk its roadmap by internalizing critical D2D interconnect IP, “acqui-hire” a world-class analog design team to fill a key expertise gap and gain complete control over the technology’s cost and evolution. Most importantly, it was a strategic play to fuel its Open Chiplet Architecture vision by owning the foundational “picks and shovels” needed to build the ecosystem.”

The chiplet value chain and M&A targets

So who are the new innovators and ultimately the acquisition targets? Woodside Capital’s report considers the following:

Interconnect specialists: companies like Eliyan and Kandou AI, which provide the critical D2D PHY IP, remain the most sought-after targets.

Specialized function providers (extreme heterogeneity): the true power of chiplets is unlocked by integrating diverse technologies:

• Analog/digital: companies like Sagence AI are using chiplets to partition their analog in-memory compute engines from their digital control logic.
• Compound semiconductors: innovators like PseudolithIC are developing paradigms to integrate compound semiconductor (GaN, InP) chiplets onto standard silicon wafers for high-performance RFICs.

I/O and memory Chiplets: disaggregating I/O into separate chiplets is a significant trend. Companies like Alphawave Semi (acquired by Qualcomm for $2.4B in June 2025) are providing off-the-shelf, multi-protocol I/O chiplets.

Ecosystem Enablers: a new category of startups is emerging to build the infrastructure for a chiplet marketplace, including companies like Yorchip, Chipletz, and zGlue.

• AMD recently licensed Arteris’ FlexGen network-on-chip (NoC) interconnect IP for its next-gen AI chiplet design, providing high-performance data transport in AMD chiplets to power AI across applications, including data centers, edge, and end devices.

An opportunity for mature foundries

Clearly, the move to chiplets and heterogeneous integration opens up new opportunities for foundries without leading edge capabilities, such as Tower Semiconductor, SkyWater Technology, and XFab, say Jones and Bismuth.

They comment, “It enables the integration of chiplets from completely different fabrication processes. Importantly, cost factors can be favorable, even with smaller wafer sizes (which are common in older and specialized processes). Why? Die sizes of chiplets are tiny, which increases the number of dice per wafer and improves yields to make them cost-effective in performance-driven applications. This does not solve the issue of testability, but it does make these older processes usable and cost-effective.”

“For example, SkyWater recently finalized the acquisition of Infineon’s 200 mm facility in Austin, Texas, which it will open to foundry customers. It will increase output for what it calls “foundational” chips on nodes from 130 nm to 65 nm. Customers like Infineon, the Department of Defense (DoD), and even quantum-computing companies like D-Wave are expected to use the fab.”

Optical I/O is the next frontier for chiplets

The Woodside Capital report authors say the stage is set for the next great technological leap in connectivity: the transition from electrical to optical I/O.

Even as electrical interconnects like UCIe improve, the rapid growth of large-scale AI systems is pushing them to their physical limits. The power needed to drive high-speed electrical signals across a rack— and the resulting thermal density— is becoming unsustainable.

The report states, “As Ayar Labs points out, the power per rack for GPU systems is expected to skyrocket, creating a “connectivity problem” that electrical I/O cannot solve efficiently. The solution lies in replacing electrons with photons. Optical I/O, which uses co-packaged optical chiplets to transmit data as light, represents the next frontier. This technology promises a transformative leap in performance, offering:

• Massively higher bandwidth density: optical waveguides can carry far more data in the same physical space.
• Lower power consumption: transmitting data with light is significantly more energy-efficient, with projections of a 10x improvement at iso-performance.
• Longer reach: optical links can efficiently transmit data over hundreds of meters, enabling true resource disaggregation and the creation of vast, coherent compute fabrics that can span multiple racks.

“This future is rapidly approaching. Companies like Ayar Labs are already producing reliable, UCIe-compliant optical I/O chiplets and the external laser sources needed to power them. Innovators like Xscape Photonics are developing novel multi-wavelength laser platforms that can further increase bandwidth per fiber by over 10x using Dense Wavelength Division Multiplexing (DWDM). These optical chiplets are the key to breaking the I/O wall and enabling the scalable, flexible, and composable AI infrastructure of the future,” the report adds.

Acquisitions will continue and chiplet market will be ‘hybrid’

The Woodside Capital report concludes that, driven by the unyielding demands of AI, chiplet architecture has moved from a niche concept to the mainstream. This disaggregation has ignited a vibrant ecosystem, but its full potential is constrained by significant challenges in testing (resolving the known good die, or KGD, problem), reliability (reliability, availability and serviceability, or RAS, especially safety, is essential as in automotive), and security (how to establish a root of trust and who is liable in a multi-vendor system).

The authors comment, “The acquisition spree is a direct result of these complexities and is set to continue. Well-funded, technologically differentiated startups focused on interconnects, packaging, security, and, increasingly, test and optical I/O solutions, are the most logical targets for the next M&A wave.”